Over the past decades, computing architectures have evolved such that Moore’s Law and MPI-type scaling alone cannot solve today’s challenge problems or maintain market relevance with CPU-only simulation performance. General compute GPU accelerators have become commonplace in both workstation and HPC settings. Bespoke architectures are emerging to further accelerate AI/ML workloads, which can have implications for computational mechanics codes, as well. Porting code, maintaining correctness, and achieving performance across these increasingly diverse architectures is a costly and enduring challenge. This mini-symposium hosts presentations describing • Methods for developing and modernizing computational mechanics software to run on emerging architectures including, but not limited to, GPU, FPGA, RISC-V, or ASICs. • Use of threading and vector intrinsics on different architectures. • Effective use of performance portability abstractions (e.g., Kokkos, Raja, OpenMP-offload, SYCL). • Testing and verification of computational mechanics software on multiple diverse and emerging architectures. • Portability and performance experiences and studies in any of the previously mentioned topic areas.