Application Case Study of Gyselalib++ for Energy Optimisation
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Improvements in high-performance computing (HPC) have historically been driven by chip manufacturers’ optimisations, with applications benefiting passively from hardware improvements. However, as HPC systems become more diverse, many codes are turning to frameworks to improve performance portability. It is not trivial to compare the performance of such codes, but energy consumption has emerged as an optimisation target that can be compared across hardware. Different strategies to optimise consumption are investigated, from whole system power capping to fine grain Dynamic Voltage and Frequency Scaling (DVFS) at application-level energy optimisation. Most studies demonstrate that energy savings can be achieved with low impacts on performance. This work aims to find the most energy efficient hardware for Gyselalib++, a code based on a performance portability framework.
